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Cypress Semiconductor /psoc63 /BLE /BLELL /EXT_PA_LNA_DLY_CNFG

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Interpret as EXT_PA_LNA_DLY_CNFG

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0LNA_CTL_DELAY0PA_CTL_DELAY

Description

External TX PA and RX LNA delay configuration

Fields

LNA_CTL_DELAY

The delay used to assert LNA_CTL, LNA_tRamp micro-seconds, ahead of first bit of the expected rx_data, which can be used to turn on the external Low Noise Amplifier. The value to be programmed to the lna_ctl_delay [7:0] = rx_on_delay - LNA_tRamp rx_on_delay[7:0] = TX_RX_ON_DELAY[7:0]) LNA_tRamp = External Low Noise Amplifier startup time
PA_CTL_DELAY

The delay used to assert PA_CTL exactly PA_tRamp micro-seconds ahead of the first bit of the tx_data, which can be used to turn on the external power amplifier. The value to be programmed to the pa_ctl_delay [7:0] = tx_on_delay - PA_tRamp tx_on_delay[7:0] = TX_RX_ON_DELAY[15:8]) PA_tRamp = External Power Amplifier ramp time

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Register License

Copyright 2016-2018 Cypress Semiconductor Corporation \n Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License.
You may obtain a copy of the License at \n
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and
limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data